1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having an improved seal pattern and method of fabricating the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for enhancing adhesion between a sealant and an array substrate, thereby providing high yield.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices having light, thin, low power consumption characteristics have been widely used in office automation (OA) equipment and video units. A typical liquid crystal display (LCD) panel has upper and lower substrates and an interposed liquid crystal layer. The upper substrate, referred to as a color filter substrate, usually includes common electrodes and color filters. The lower substrate, referred to as an array substrate, includes switching elements, such as thin film transistors (TFTs), and pixel electrodes.
A brief explanation of a conventional liquid crystal display manufacturing process will be discussed for better understanding of the present invention.
Common electrodes and pixel electrodes are formed on upper and lower substrates, respectively. A seal is then formed on the lower substrate. The upper and lower substrates are then bonded together using the seal such that the common electrodes of the upper substrate and the pixel electrodes of the lower substrate face each other, forming liquid crystal cells.
Liquid crystal material is then injected into those cells through injection holes. The injection holes are then sealed. Finally, polarizing films are attached to the outer surfaces of the upper and lower substrates.
The pixel and common electrodes generate electric fields that control the light passing through the liquid crystal cells. By controlling the electric fields, desired characters or images are displayed.
FIG. 1 is the configuration of a typical TFT-LCD device. The TFT-LCD device 11 includes upper and lower substrates 5 and 22 with an interposed liquid crystal 14. The upper and lower substrates 5 and 22 are referred to as a color filter substrate and an array substrate, respectively.
In the upper substrate 5, on the surface opposing the lower substrate 22, a black matrix 6 and a color filter layer 7 that includes a plurality of red (R), green (G), and blue (B) color filters are formed in the shape of an array matrix. Each color filter 7 is thus surrounded by the black matrix 6. Further on the upper substrate 5, a common electrode 18 is formed and covers the color filter layer 7 and the black matrix 6.
In the lower substrate 22, on the surface opposing the upper substrate 5, a thin film transistor (TFT) “T”, as a switching device, is formed in the shape of an array matrix corresponding to the color filter layer 7. A plurality of crossing gate and data lines 13 and 15 are positioned such that each TFT “T” is located near each crossing point of the gate and data lines 13 and 15.
Further in the lower substrate 22, a plurality of pixel electrodes 17 are formed on the area defined by the gate and data lines 13 and 15. The defined area is called a pixel region “P”. The pixel electrode 17 is usually formed of a transparent conductive material having good transmissivity such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).
Although fabricating various components of a liquid crystal display, such as a thin film transistor or a color filter, typically requires numerous process steps, the overall fabrication process is relatively straightforward.
FIG. 2 illustrates a manufacturing process for the typical liquid crystal display panel. Step st1 forms an array matrix of thin film transistors and pixel electrodes over an array (lower) substrate. In this initial step (st1), each pixel electrode corresponds to each thin film transistor.
Step st2 forms an orientation film over the lower (array) substrate and the upper (color filter) substrate. This process involves uniformly depositing a polymer thin film over the lower substrate and then uniformly rubbing the polymer thin film with a fabric. The rubbing process involves rubbing the surface of the polymer thin film to orientate or align the film. This rubbing process is so important as to determine an orientation direction of the liquid crystal layer. Also, owing to this rubbing process, the liquid crystal layer is properly driven and a uniform display characteristic can be achieved. A typical orientation film is an organic thin film such as a polyimide thin film.
Step st3 produces a seal pattern on the lower substrate. When the upper and lower substrates are attached, the seal pattern forms cell spaces that will receive the liquid crystal material. The seal pattern will also prevent the interposed liquid crystal material from leaking out of the completed liquid crystal cell. A thermosetting plastic and a screen-print technology are conventionally used to fabricate the seal pattern.
Step st4 is to spray spacers over the lower substrate. The spacers have a definite size and act to maintain a precise and uniform space between the upper and lower substrates. Accordingly, the spacers are placed with a uniform density on the lower substrate using either a wet spray method, in which case the spacers are mixed in an alcohol and then sprayed, or a dry spray method in which only the spacers are sprayed. The dry spray method is divided into a static electric spray method that uses static electricity and a non-electric spray method that uses gas pressure. Since static electricity can be harmful to the liquid crystal, the non-electric spray method is more widely used than the electric spray method.
The next step, st5, is to align and attach the upper and lower substrates together. An aligning margin, which is less than a few micrometers, is important in this step. If the upper and lower substrates are aligned and attached beyond the aligning margin, light may leak from the panel such that the liquid crystal cell cannot adequately performed its function. As a result, resolution characteristics of the LCD device are deteriorated.
Step st6 cuts liquid crystal elements fabricated through the above five steps into individual liquid crystal cells. Conventionally, a liquid crystal material was injected into the space between the upper and the lower substrates before cutting the liquid crystal element into individual liquid crystal cells. However, as the display devices have become larger, the liquid crystal cells are usually cut first and then the liquid crystal material is injected. The cutting process typically includes scribing using a diamond pen to form cutting lines on a substrate, and a breaking step that separates the substrate along the scribed lines.
Step st7 actually injects a liquid crystal material into the individual liquid crystal cells. Since each individual liquid crystal cell is a few square centimeters in area, but has only a few micrometers gap between plates, a vacuum injection method is widely used since it is more efficient. Generally, the step of injecting the liquid crystal material into the cells takes the longest process time in manufacturing. Thus, for manufacturing efficiency, it is important to use optimum conditions for a vacuum injection.
Now, referring to FIG. 3, the screen print method used for the seal pattern process of the third step (st3) of FIG. 2 is explained.
A screen print technology is facilitated with a patterned screen 6 and a squeegee 8. In order to interpose the liquid crystal without leakage, the seal pattern 2 is formed along the edges of a substrate 22. At one side of the edge, an injection hole 4 for injecting the liquid crystal is formed. To form the seal pattern 2, a thermosetting resin or an ultraviolet-setting epoxy resin and the like is deposited on the substrate 22. Thereafter, a solvent included in the sealant is evaporated for leveling.
At this point, although the epoxy resin itself may not harmful to the liquid crystal, an amine in a thermo-hardening solvent for forming the thermosetting resin decomposes the liquid crystal. Thus, when using the epoxy resin for the seal pattern 2, the sealant formed through the screen-print technology should be pre-baked sufficiently with a gradual variance of the baking temperature. Further, in forming the seal pattern, uniformity in thickness and width of the sealant are very important to maintain a uniform spacing (or gap) between the two substrates.
FIG. 4 shows a conventional seal pattern formed on a substrate via the above-mentioned seal-patterning technology, such as a screen-print method. Referring to FIG. 4, a seal pattern 2 is formed on a substrate 22. The seal pattern 2 includes main seal lines 2a and auxiliary seal lines 2b. As previously explained, the main seal lines 2a prevent a leakage of the liquid crystal while the auxiliary seal lines 2b surround the main seal lines 2a to protect the main seal lines 2a from a cleaning solution or an etching solution during cleaning and etching processes.
FIG. 5A, a cross-sectional view taken along the line V—V of FIG. 4, illustrates one pixel of the liquid crystal panel and the seal patterns formed between the upper and lower substrates. Now, referring to FIG. 5A, a fabrication process of the array substrate 23 is explained in detail hereinafter.
In general, when forming-the array substrate 23, the fabrication process varies with a type of the thin film transistor “T”. For convenience, an inverted staggered type thin film transistor (TFT) is employed as a switching element of the liquid crystal panel for a description of the background technology. Thus, a process of forming the inverted staggered type TFT will be explained.
First, a plurality of gate lines (reference numeral 13 of FIG. 1) and a gate electrode 32 extended from each gate line are formed on the lower substrate 22 by depositing and patterning a first metallic material, such as aluminum (Al), chrome (Cr), molybdenum (Mo) or etc. After that, a gate insulation layer 33 is formed on the substrate 22 to cover the gate lines and electrodes by depositing an inorganic material such as silicon oxide (SiO2) or silicon nitride (SiNx).
By depositing and patterning a semiconductor layer on the gate insulation layer 33, an active layer 36 having an island shape is formed over each gate electrode 32. On the active layer 36, source and drain electrodes 39 and 41 overlap both ends of the gate electrode 32 and are spaced apart from each other. The source and drain electrodes 39 and 41 are formed of the same material as the first metallic material and formed by the depositing and pattering processes. Moreover, a plurality of data lines (reference numeral 15 of FIG. 1) perpendicular to each gate line are formed with the source and drain electrodes 39 and 41. Each source electrode 39 is extended from each data line.
The thin film transistor “T” is located near the crossing point of the gate and data lines. Also, each pair of the data and gate lines defines a pixel area.
Next, an organic material such as benzocyclobutene (BCB) or acryl is deposited over the thin film transistor T and the gate insulation layer 33 in order to form a passivation layer 35. Then, the passivation layer 35 is patterned to form a drain contact hole 34 that exposes a portion of the drain electrode 41. Thereafter, a pixel electrode 38 is formed on the passivation layer 35 by depositing and patterning a transparent conductive material. Thus, the drain electrode 41 is electrically connected with the pixel electrode 38 through the drain contact hole 34.
After forming the array substrate 23 that includes the lower substrate 22, the gate insulation layer 33, the passivation layer 35, the TFT and etc, the upper substrate 5 having the common electrode 18 is aligned and attached to the array substrate 23 using the sealant 2 (i.e., the seal pattern). As the sealant 2 is mainly used for attaching the upper substrate 5 to the array substrate 23, the sealant 2 is positioned between the common electrode 18 and the passivation layer (organic material) 35, as shown in FIG. 5.
The passivation layer 35 and the gate insulation layer 33, which are respectively formed of the organic material and the inorganic material, have an etching hole (not shown in FIG. 5) in a seal pattern area having a width. Since the sealant 2 does not have good adhesive force to the organic material (the passivation layer 35), the sealant 2 often bursts. Because of this problem, the etching hole is formed in the array substrate 23.
In the seal pattern area, the passivation layer 35 is mostly etched out, and thus, the sealant 2 may contact the inorganic material (the gate insulation layer 33). Thus, the sealant 2 does not largely contact the organic material (the passivation layer 35) that has a lower adhesive force to the sealant 2. Moreover, owing to the etching hole, the contacting area increases between the sealant 2 and the array substrate 23.
However, the above-mentioned structure does not provide a required adhesion, and also it does not sufficiently enlarge the seal pattern area that is the contacting area between the seal pattern 2 and the array substrate 23. Accordingly, it is essential to obtain the large seal pattern area and to increase the contacting area in the liquid crystal panel. Moreover, to obtain a large contacting area, enlarging the width of the seal pattern 2 is not good enough because of an aperture ratio. As a result, it reaches the limit to enlarge the width.